In computer architectures, a bus is a subsystem for transferring data between computer components of a single computer or between computers. Unlike a point-to-point connection, a bus logically connects several peripherals over the same set of signal lines. In other words, each bus typically comprises a set of signal lines that electronically connect devices, such as a CPU and memory. A bus includes an address bus and a data bus. The data bus transfers data whereas the address bus transfers information regarding the physical location of the data or the location of the destination of the data. Buses can be parallel buses, which carry data words in parallel on multiple signal lines, or serial buses, which carry data in bit-serial form. Most computers have both internal and external buses. An internal bus is composed of a set of signal lines printed on a circuit board. The internal bus connects the internal components of a computer. On the other hand, an external bus connects external peripherals to a circuit board.
In recent years, developments in integrated circuit (“IC”) technology have shown remarkable progress in reducing the size of computer components, which has led to increases in component densities, decreases in the cross-sectional dimensions of signal lines, and crowding of signal lines into smaller surface areas. As a result, conventional metal signal lines are approaching the fundamental physical limits of their information-carrying capacity. In addition, the relative amount of time needed to traverse printed circuit paths of a bus becomes too long to take full advantage of the high-speed performance offered by smaller components. In other words, as data rates increase, the information carrying capacity of signal lines decreases with a reduction in the size of the signal lines, and closely spaced signal lines cannot pass high speed signals without creating interference or cross talk.
Thus, manufacturers, designers, and users of computing devices have recognized a market for high-speed buses for distributing data between IC components without the surface area and signal-speed constraints inherent in currently employed buses.